The invention relates to a duration and frequency programmable electronic pulse generator.
In the current industrial world, many applications require the implementation of operations for measuring absolute or relative time and for generating electronic pulses at precise instants. These operations or functions are usually carried out by up-counters, down-counters, signal generators or width-modulated electronic pulses, denoted PWM standing for Pulse Width Modulation or frequency synthesizers. All of the above devices include a clock, or a counter, as well as electronic circuits capable of producing state actions dependent on time or on extraneous events. These devices may be used in widely varying sectors of activity and make it possible to produce either electronic pulses of variable frequency or duty ratio, or, by integration, variable analog voltages.
By way of an example application, it is indicated that the field of automobile construction uses PWM to implement antilock braking systems ABS, speed display, lighting intensity dimmer modules, controls for electric motors, such as stepper motors, and frequency telecontrol.
Likewise, in the telecommunications sector, PWM devices may be used for the synchronization of real-time systems, the creation of electronic numbering pulses (DTMF) or ringer tones.
Finally, in the field of production industry, PWM devices are used for the positioning of telecontrol servomotors, the control of motors and lighting dimmers for example. Frequency synthesizers may serve in the creation of sounds, and the modulation of signals transmitted over wires or optical fiber.
Generally, the PWM devices known in the state of the art have several outputs, each of these outputs being the site of an individual switching, generating a pulse, when a timebase, such as a counter, coincides with the value assigned to the relevant output. Each output then reverts to its complemented switching state when the counter reaches its final periodic count value, denoted modulo value. Such a mode of operation considerably reduces the flexibility of these devices, especially when it is necessary, either to produce multiple pulses, pulse trains, or when phase-shifted controls have to be produced, the phase-shift having, in such a case, to be greater than the time interval between the switching into coincidence with the value assigned and the modulo value.
By way of example of devices of this type, such as represented in FIG. 1a, these comprise a timebase, which is common to all the generators or PWM outputs, and which is incremented with each edge of a system clock pulse. When the content of the counter/timebase is equal to 0, all the PWM outputs pass to a first state, whereas when the content of the counter/timebase is equal to the value assigned to a generator or PWM output, this output switches to a second state, the complement of the first state. This process is performed by way of a comparator which switches the output when the two values are equal. When the count value of the counter reaches its modulo value, all the PWM outputs are switched to the first state, and so on. A timing diagram of the corresponding signals is represented in FIG. 1b.
An improvement to the devices of the type represented in FIG. 1a consists, as represented in FIG. 1c, in using a counter/timebase whose modulo value is larger and in comparing the content of a register for storing the assignment value coded on n bits of the PWM device with the n-2, . . . , 0! lowest-order bits of the counter and the content of another register of another PWM device with the n-1 highest-order bits. By reason of the fact that the timebase effected by the n-1 lowest-order bits is twice as fast as that effected by the n bits, the periods of the corresponding PWM outputs differ in a ratio 2. This mode of operation affords an improvement over that represented in FIGS. 1a and 1b, the speed of comparison being, at most, doubled, but nevertheless limits the desired flexibility since one of the outputs is blocked for a period T whereas the other output remains blocked for a period T/2.
Finally, certain more sophisticated devices make it possible to choose either one PWM output over T and the other output over T/2, as in the case of FIGS. 1c, 1d, or both over T, or else both over T/2.
However, these devices nevertheless remain subject to the time constraint T or T/2.
One solution could, as the case may be, consist in adopting other periods, sub-multiples of T, but the basic limitations remain.
Another solution could also consist in installing one counter/timebase per PWM output.
However, the above solutions are difficult to envisage in the case in which the number of PWM outputs is extended, in particular with a view to an embodiment in integrated circuit form, by reason of the silicon on-cost engendered by the proliferation of auxiliary circuits such as counter/timebase and multiplexer, which makes the installing of these devices almost unattainable.
The object of the present invention is to remedy the above drawbacks by implementing a PWM generator which, although using only a single counter/timebase, nevertheless makes it possible to produce electronic pulses of programmable width and frequency.
Another object of the present invention is, moreover, the implementation of such a width and frequency programmable electronic pulse PWM generator on a plurality of distinct outputs, thus making it possible to confer very great flexibility of use on such a generator.
Another object of the present invention is also the implementation of a PWM generator in which the period of a transmitted pulse train is greater than or equal to that of the reference clock, system clock signal.
Another object of the present invention is finally the implementation of a PWM generator in integrated circuit form, in CMOS technology, in which the silicon cost is minimized, in the absence of the proliferation of auxiliary circuits.